#include "top_SM2.hpp"
void my_module::always_block0()
void my_module::always_block0()
void my_module::always_block0()
void my_module::always_block0()
void my_module::always_block0()
void my_module::always_block0()
void my_module::always_block0()

{
	

{None,None,None,None,None,None,None,None}  =  {x3_1,x3_2,x3_3,x3_4,x3_5,x3_6,x3_7,x3_8};
	break;


{None,None,None,None,None,None,None,None}  =  {y3_1,y3_2,y3_3,y3_4,y3_5,y3_6,y3_7,y3_8};
	break;
wire [31:0] status_reg;

    wire ahb_trans_valid;
    wire ahb_trans_clear;
    wire ahb_write_en;
    wire ahb_read_en;
    reg lite_write_req;
    reg lite_read_req;

reg [31:0] 	rdata;

reg [1:0] 	HTRANS_reg;
reg 		HWRITE_reg,HSEL_reg;
reg [11:0] Reg_ofs_addr_ff;
wire [11:0] SM2_ofs_addr;
reg [2:0]  HSIZE_reg;

assign HRDATA = rdata.read();
assign HREADY =  1;
assign HRESP =   0;

    assign ahb_trans_valid = HSEL && HREADY && 
                             (None = =  1);
    assign ahb_write_en  =  ahb_trans_valid.read() && HWRITE.read();
    assign ahb_read_en   =  ahb_trans_valid.read() && (!HWRITE.read());

    

    			if(!HRESETn.read())
	{

      
        lite_write_req =  0;
      	break;
      
	}
else			if(ahb_write_en.read())
	{

      
        lite_write_req =  1;
      	break;
      
	}
else
	{
      
        lite_write_req =  0;
      	break;

    	break;


      			if(!HRESETn.read())
	{

          
            Reg_ofs_addr_ff =     120xfff;
            HSIZE_reg =   0;
          	break;
        
	}
else			if(ahb_trans_valid.read())
	{

          
            Reg_ofs_addr_ff =     HADDR.range(11, 0);
            HSIZE_reg =   HSIZE.read();
          	break;
        
	}
else
	{
          
            Reg_ofs_addr_ff =     120xfff;
            HSIZE_reg =    0;
          	break;
       
      	break;

  assign   SM2_ofs_addr  =  Reg_ofs_addr_ff.read();


      
            control_reg =     320xffff_ffff.read();
        
	}
else
            control_reg =     HWDATA.read();


        
	}
else
	{
            control_reg	 =  control_reg.read();
  	break;
 
  

integer sm2_i;

			if(!HRESETn.read())
	{

		for(sm2_i  =  0; sm2_i.read()<8;
			NoneNone =	32None;	NoneNone =	32None;	NoneNone =	32None;	NoneNone =	32None;	NoneNone  = 	320x0;
			break;
		break;
	
	}
else			if(control_reg.read()control_reg.read()]=control_reg.read())
	{

        for(sm2_i  =  0; sm2_i.read()<8;
            NoneNone =    32None;    NoneNone =    32None;    NoneNone =    32None;    NoneNone =    32None;    NoneNone  =     320x0;
        	break;
		break;
	
	}
else
		case(SM2_Reg_addr)
			None	NoneNone  = 	HWDATA.read();
			None	NoneNone  = 	HWDATA.read();
			None	NoneNone  = 	HWDATA.read();
			None	NoneNone  = 	HWDATA.read();
			addr_k :	NoneNone   = 	HWDATA.read();
	
		endcase
		break;
	
	}
else
	{ 
		for(sm2_i  =  0; sm2_i.read()<8;
			NoneNone =NoneNone;	NoneNone =NoneNone;	NoneNone =NoneNone;	NoneNone =NoneNone;	NoneNone  = NoneNone;
			break;
	break;



  			if(!HRESETn.read())
	{

        rdata = 32'hFFFF_FFFF.read();
    	break;
    
	}
else			if( ahb_read_en.read() &&  ahb_read_en.read() == ahb_read_en.read()) )
	{

	case(SM2_Reg_addr_R)
		None	rdata  =  NoneNone;
		None	rdata  =  NoneNone;
		None	rdata  =  NoneNone;
		None	rdata  =  NoneNone;
		addr_k :		rdata  =   NoneNone;
		None	rdata  =  NoneNone;
		None	rdata  =  NoneNone;
		default:			if(HADDR.read()HADDR.read()HADDR.read()] ==HADDR.read())
	{

				rdata  =  status_reg.read();
			
	}
else			if(HADDR.read()HADDR.read()HADDR.read()] ==HADDR.read())
	{

				rdata  =  control_reg.read();
			
	}
else
	{                             
				rdata = 32'hFFFF_FFFF.read();
			break;
	endcase
	
	}
else
	{
	   	rdata  =  rdata.read();
  	break;

ECC256 ECC256_inst1(
.rst_n(HRESETn),.clk(HCLK),.mode_sm2(control_reg),
.x1_1(x1[7]),.x1_2(x1[6]),.x1_3(x1[5]),.x1_4(x1[4]),.x1_5(x1[3]),.x1_6(x1[2]),.x1_7(x1[1]),.x1_8(x1[0]),
.x2_1(x2[7]),.x2_2(x2[6]),.x2_3(x2[5]),.x2_4(x2[4]),.x2_5(x2[3]),.x2_6(x2[2]),.x2_7(x2[1]),.x2_8(x2[0]),
.y1_1(y1[7]),.y1_2(y1[6]),.y1_3(y1[5]),.y1_4(y1[4]),.y1_5(y1[3]),.y1_6(y1[2]),.y1_7(y1[1]),.y1_8(y1[0]),
.y2_1(y2[7]),.y2_2(y2[6]),.y2_3(y2[5]),.y2_4(y2[4]),.y2_5(y2[3]),.y2_6(y2[2]),.y2_7(y2[1]),.y2_8(y2[0]),
.k_1(k[7]),.k_2(k[6]),.k_3(k[5]),.k_4(k[4]),.k_5(k[3]),.k_6(k[2]),.k_7(k[1]),.k_8(k[0]),
.state_sm2(status_reg),
.x3_1(x3_1),.x3_2(x3_2),.x3_3(x3_3),.x3_4(x3_4),.x3_5(x3_5),.x3_6(x3_6),.x3_7(x3_7),.x3_8(x3_8),
.y3_1(y3_1),.y3_2(y3_2),.y3_3(y3_3),.y3_4(y3_4),.y3_5(y3_5),.y3_6(y3_6),.y3_7(y3_7),.y3_8(y3_8),
.sm2_vic_int(sm2_vic_int)
);



ifdef SM2_sim
reg[255:0] data_x;
reg[255:0] data_y;



data_x = {x3[0],x3[1],x3[2],x3[3],x3[4],x3[5],x3[6],x3[7]};
	break;


data_y = {y3[0],y3[1],y3[2],y3[3],y3[4],y3[5],y3[6],y3[7]};
	break;


			if((status_reg.read()=(status_reg.read()(status_reg.read()))
	{

     
     $display("data_x:%h",data_x);
     $display("data_y:%h",data_y);
     $display("Time:%t",$time);
     	break;
     
	}
else
	{
     $display("testing_sm2");
	break;

	}
else
	{


endif


  

	}
	}